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INTEGRATED CIRCUITS
DATA SHEET
74LVC4066 Quad bilateral switches
Product specification 2003 Aug 12
Philips Semiconductors
Product specification
Quad bilateral switches
FEATURES * Very low ON resistance: - 7.5 (typical) at VCC = 2.7 V - 6.5 (typical) at VCC = 3.3 V - 6 (typical) at VCC = 5 V. * ESD protection: - HBM EIA/JESD22-A114-A Exceeds 2000 V - MM EIA/JESD22-A115-A Exceeds 200 V. * High noise immunity * CMOS low power consumption * Latch up performance exceeds 250 mA * Complies with JEDEC standard no. 8-1A * Direct interface TTL-levels. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf 2.5 ns. SYMBOL tPZH/tPZL tPHZ/tPLZ CI CPD CS PARAMETER turn-on time E to Vos turn-off time E to Vos input capacitance power dissipation capacitance switch capacitance CONDITIONS CL = 50 pF; RL = 500 ; VCC = 3 V CL = 50 pF; RL = 500 ; VCC = 5 V CL = 50 pF; RL = 500 ; VCC = 3 V CL = 50 pF; RL = 500 ; VCC = 5 V VCC = 3 V VCC = 3.3 V; notes 1 and 2 OFF-state ON-state Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD x VCC2 x fi x N + ((CL + CS) x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; CS = switch capacitance. 2. The condition is VI = GND to VCC. DESCRIPTION
74LVC4066
The 74LVC4066 is a high-speed Si-gate CMOS device. The 74LVC4066 has four independent analog switches. Each switch has two input/output terminals (nY and nZ) and an active HIGH enable input (nE). When nE is LOW, the analog switch is turned off.
TYPICAL 2.5 1.9 3.4 2.5 3.5 12.5 8.0 14.0 ns ns ns ns pF pF pF pF
UNIT
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
FUNCTION TABLE See note 1. INPUT nE L H Note 1. H = HIGH voltage level; L = LOW voltage level. ORDERING INFORMATION PACKAGE TYPE NUMBER 74LVC4066D 74LVC4066PW 74LVC4066BQ PINNING PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SYMBOL 1Y 1Z 2Z 2Y 2E 3E GND 3Y 3Z 4Z 4Y 4E 1E VCC DESCRIPTION independent input/output independent output/input independent output/input independent input/output enable input (active HIGH) enable input (active HIGH) ground (0 V) independent input/output independent output/input independent output/input independent input/output enable input (active HIGH) enable input (active HIGH) supply voltage
handbook, halfpage
74LVC4066
SWITCH OFF ON
TEMPERATURE RANGE -40 to +125 C -40 to +125 C -40 to +125 C
PINS 14 14 14
PACKAGE SO14 TSSOP14 DHVQFN14
MATERIAL plastic plastic plastic
CODE SOT108-2 SOT402-1 SOT762-1
1Y 1Z 2Z 2Y 2E 3E GND
1 2 3 4 5 6 7
MNB109
14 VCC 13 1E 12 4E
4066
11 4Y 10 4Z 9 3Z
8 3Y
Fig.1 Pin configuration SO14 and TSSOP14.
2003 Aug 12
3
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
handbook, halfpage
1Y 1
VCC 14 13 12 1E 4E 4Y
handbook, halfpage
1 13 4 5
1Y 1E 2Y 2E 3Y 3E 4Y 4E
1Z
2
1Z 2Z 2Y 2E 3E
2 3 4 5 6 7 Top view GND 8 3Y
2Z
3
GND(1)
11 10 9
8 4Z 3Z 6 11 12
MNB110
3Z
9
4Z 10
MNB111
(1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input.
Fig.2 Pin configuration DHVQFN14.
Fig.3 Logic symbol.
1 1 13 # 4 5 8 6 11 12 # (a) # 10 # 9 8 6 11 12 # # 3 2 13 # 4 5 #
1 X1
1
2
handbook, halfpage
1 X1 1 X1
1
3
Z
1
9 Y E
1 X1 (b)
1
10 VCC
MNA658
MNB112
Fig.4 logic symbol (IEEE/IEC).
Fig.5 Logic diagram (one switch).
2003 Aug 12
4
Philips Semiconductors
Product specification
Quad bilateral switches
RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VS Tamb tr, tf PARAMETER supply voltage input voltage switch voltage operating ambient temperature input rise and fall times VCC = 1.65 to 2.7 V VCC = 2.7 to 5.5 V CONDITIONS
74LVC4066
MIN. 1.65 0 0 -40 0 0
MAX. 5.5 5.5 VCC +125 20 10
UNIT V V V C ns/V ns/V
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V); see note 1. SYMBOL VCC VI IIK ISK VS IS ICC, IGND Tstg Ptot Notes 1. To avoid drawing VCC current out of terminal Z, when switch current flows in terminal Y, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminal Y. In this case there is no limit for the voltage drop across the switch, but the voltage at Y and Z may not exceed VCC or GND. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 3. For SO14 packages: above 70 C derate linearly with 8 mW/K. For TSSOP14 packages: above 60 C derate linearly with 5.5 mW/K. For DHVQFN14 packages: above 60 C derate linearly with 4.5 mW/K. PARAMETER supply voltage input voltage input diode current switch diode current switch voltage switch source or sink current VCC or GND current storage temperature power dissipation Tamb = -40 to +125 C; note 3 note 2 VI < -0.5 V or VI > VCC + 0.5 V VI < -0.5 V or VI > VCC + 0.5 V enable and disable mode -0.5 < VS < VCC + 0.5 V CONDITIONS MIN. -0.5 -0.5 - - -0.5 - - -65 - MAX. +6.5 +6.5 -50 50 +6.5 50 100 +150 500 UNIT V V mA mA V mA mA C mW
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
DC CHARACTERISTICS At recommended operating conditions; voltage are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = -40 to +85 C; note 1 VIH HIGH-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VIL LOW-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 ILI IS(OFF) IS(ON) ICC ICC input leakage current (control pin) analog switch OFF-state current analog switch ON-state current quiescent supply current additional quiescent supply current per control pin VI = 5.5 V or GND 5.5 0.65VCC 1.7 2.0 0.7VCC - - - - - - - - - - - - - - - - - 0.1 0.1 0.1 0.1 5 VCC (V) MIN. TYP.
74LVC4066
MAX.
UNIT
- - - - 0.35VCC 0.7 0.8 0.30VCC 5 5 5 10 500
V V V V V V V V A A A A A
VI = VIH or VIL; 5.5 |VS| = VCC - GND; see Fig.7 VI = VIH or VIL; 5.5 |VS| = VCC - GND; see Fig.8 VI = VCC or GND; VS = GND or VCC; IO = 0 A VI = VCC - 0.6 V; VS = GND or VCC; IO = 0 A 5.5 5.5
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = -40 to +125 C VIH HIGH-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VIL LOW-level input voltage 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 ILI IS(OFF) IS(ON) ICC ICC input leakage current (control pin) analog switch OFF-state current analog switch ON-state current quiescent supply current additional quiescent supply current per control pin VI = 5.5 V or GND 5.5 0.65VCC 1.7 2.0 0.7VCC - - - - - - - - - - - - - - - - - - - - - - - - - - 0.35VCC 0.7 0.8 0.30VCC 20 20 20 40 5000 V V V V V V V V A A A A A VCC (V) MIN. TYP. MAX. UNIT
5.5 VI = VIH or VIL; |VS| = VCC - GND; see Fig.7 5.5 VI = VIH or VIL; |VS| = VCC - GND; see Fig.8 VI = VCC or GND; VS = GND or VCC; IO = 0 A VI = VCC - 0.6 V; VS = GND or VCC; IO = 0 A 5.5 5.5
Note 1. All typical values are measured at Tamb = 25 C.
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
Resistance RON TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = -40 to +85 C; note 1; see Fig.6 RON(peak) ON-resistance (peak) VS = GND to VCC; VI = VIH 4 8 12 24 32 RON(rail) ON-resistance (rail) VS = GND; VI = VIH 4 8 12 24 32 VS = VCC; VI = VIH 4 8 12 24 32 RON(flatness) ON-resistance (flatness) VS = GND to VCC; VI = VIH; see Figs.10 to 13 4 8 12 24 32 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 1.8 2.5 2.7 3.3 5.0 - - - - - - - - - - - - - - - - - - - - 35 14 IS (mA) VCC (V) MIN.
74LVC4066
TYP.
MAX. UNIT
100 30 25 20 15 30 20 18 15 10 30 20 18 15 10 - - - - -

11.5 8.5 6.5 10 8.5 7.5 6.5 6 12 8.5 7.5 6.5 6 100 17 10 5 3
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
TEST CONDITIONS SYMBOL PARAMETER OTHER Tamb = -40 to +125 C; see Fig.6 RON(peak) ON-resistance (peak) VS = GND to VCC; VI = VIH 4 8 12 24 32 RON(rail) ON-resistance (rail) VS = GND; VI = VIH 4 8 12 24 32 VS = VCC; VI = VIH 4 8 12 24 32 Note 1. Typical value Ron(flatness) is measured at Tamb = -40 to +85 C, all other typical values are measured at Tamb = 25 C. 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 150 45 38 30 23 45 30 27 23 15 45 30 27 23 15 IS (mA) VCC (V) MIN. TYP. MAX. UNIT
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
E E VIH V Y Y VS = GND to VCC Z A IS VI = VCC or GND GND GND
MNA659 MNA660
VIL
Z A VO = GND or VCC GND
Fig.6
Test circuit for measuring ON-state resistance (RON).
Fig.7 Test circuit for measuring OFF-state current.
102 handbook, halfpage RON () VIH E
MNA673
VCC = 1.8 V
Y A VI = VCC or GND
Z 10 A VO (open circuit) GND
MNA661
2.5 V 3.3 V 5.0 V
2.7 V
1
0
1
2
3
4
VI (V)
5
Fig.9 Fig.8 Test circuit for measuring ON-state current.
Typical ON-resistance (RON) as a function of input voltage (VS) for VS = GND to VCC.
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
handbook, halfpage
15
MNA663
handbook, halfpage
15
MNA664
RON () 10
Tamb = +85 C +25 C -40 C
RON () 10 Tamb = +85 C +25 C -40 C
5
5
0
0
1
2
Vl (V)
3
0 0 1 2 Vl (V) 3
Fig.10 RON for VCC = 2.5 V.
Fig.11 RON for VCC = 2.7 V.
handbook, halfpage
10
MNA665
handbook, halfpage
8
MNA666
RON () 8 Tamb = +85 C
RON ()
7
6 6 +25 C -40 C 4 4 2 5
Tamb = +85 C
+25 C -40 C
3
0 0 1 2 3 Vl (V) 4
2 0 1 2 3 4 VI (V) 5
Fig.12 RON for VCC = 3.3 V.
Fig.13 RON for VCC = 5.0 V.
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
AC CHARACTERISTICS GND = 0 V. TEST CONDITIONS SYMBOL PARAMETER WAVEFORMS Tamb = -40 to +85 C; note 1 tPHL/tPLH propagation delay nY to nZ see Figs 14 and 16; or nZ to nY note 2 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 tPZH/tPZL turn-ON time E to VOS see Figs 15 and 16 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 tPHZ/tPLZ turn-OFF time E to VOS see Figs 15 and 16 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 Tamb = -40 to +125 C tPHL/tPLH propagation delay nY to nZ see Figs 14 and 16; or nZ to nY note 2 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 tPZH/tPZL turn-ON time E to VOS see Figs 15 and 16 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 tPHZ/tPLZ turn-OFF time E to VOS see Figs 15 and 16 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 4.5 to 5.5 Notes 1. All typical values are measured at Tamb = 25 C. - - - - - 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 - - - - - - - - - - - - - - - - - - - - 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 0.8 0.4 0.4 0.3 0.2 5.3 3.0 2.6 2.5 1.9 4.2 2.4 3.6 3.4 2.5 VCC (V) MIN. TYP.
74LVC4066
MAX.
UNIT
2.0 1.2 1.0 0.8 0.6 10 5.6 5.0 4.4 3.9 9.0 5.5 6.5 6.0 5.0
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
3.0 2.0 1.5 1.5 1.0 12.5 7.0 6.5 5.5 5.0 11.5 7.0 8.5 7.5 6.5
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
2. tPHL/tPLH propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified capacitance when driven by an ideal voltage source (zero output impedance).
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
AC WAVEFORMS
handbook, halfpage VI
74LVC4066
Y or Z GND
VM
t PHL VOH Z or Y VOL VM
t PLH
MNA667
INPUT VCC 1.65 to 1.95 V 2.3 to 2.7 V 4.5 to 5.5 V VM 0.5VCC 0.5VCC 0.5VCC VI VCC VCC 2.7 V VCC tr = tf 2.0 ns 2.0 ns 2.5 ns 2.5 ns
2.7 and 3.0 to 3.6 V 1.5 V
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.14 The input (VS) to output (VO) propagation delays.
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
handbook, full pagewidth
VI E GND t PLZ VCC Y or Z output LOW-to-OFF OFF-to-LOW VOL t PHZ Y or Z output HIGH-to-OFF OFF-to-HIGH VOH VY VM GND switch enabled switch disabled switch enabled
MNA668
VM
t PZL
VM VX t PZH
INPUT VCC 1.65 to 1.95 V 2.3 to 2.7 V 2.7 and 3.0 to 3.6 V 4.5 to 5.5 V VM 0.5VCC 0.5VCC 1.5 V 0.5VCC VI VCC VCC 2.7 V VCC tr = tf 2.0 ns 2.0 ns 2.5 ns 2.5 ns
VX = VOL + 0.3 V at VCC 2.7 V; VX = VOL + 0.1 x VCC at VCC < 2.7 V; VY = VOH - 0.3 V at VCC 2.7 V; VY = VOH - 0.1 x VCC at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load.
Fig.15 Turn-on and turn-off times.
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
handbook, full pagewidth
VEXT VCC PULSE GENERATOR VI D.U.T. RT CL RL VO RL
MNA616
VCC 1.65 to 1.95 V 2.3 to 2.7 V 4.5 to 5.5 V
VI VCC VCC VCC
CL 30 pF 30 pF 50 pF 50 pF
RL 1 k 500 500 500
VEXT tPLH/tPHL open open open open tPZH/tPHZ GND GND GND GND tPZL/tPLZ 2VCC 2VCC 6V 2VCC
2.7 and 3.0 to 3.6 V 2.7 V
Definitions for test circuits: RL = Load resistor. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.16 Load circuitry for switching times.
ADDITIONAL AC CHARACTERISTICS Recommended conditions and typical values at Tamb = 25 C. SYMBOL dsin PARAMETER sine-wave distortion TEST CONDITIONS VCC (V) TYPICAL 0.032 0.008 0.006 0.005 0.068 0.009 0.008 0.006 170 210 212 215 > 500 > 500 > 500 > 500 UNIT % % % % % % % % MHz MHz MHz MHz MHz MHz MHz MHz
RL = 10 k; CL = 50 pF; fin = 1 kHz; 1.65 see Fig.18 2.3 3 4.5 RL = 10 k; CL = 50 pF; fin = 10 kHz; see Fig.18 1.65 2.3 3 4.5
fON
switch ON signal frequency response
RL = 600 ; CL = 50 pF; see Fig.17; note 1
1.65 2.3 3 4.5
RL = 50 ; CL = 5 pF; see Fig.17; note 1
1.65 2.3 3 4.5
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
SYMBOL OFF(feedthru)
PARAMETER switch OFF signal feed-through attenuation
TEST CONDITIONS RL = 600 ; CL = 50 pF; fin = 1 MHz; see Fig.19; note 2
VCC (V) 1.65 2.3 3 4.5
TYPICAL -46 -46 -46 -46 -42 -42 -42 -42 69 87 156 302 -58 -58 -58 -58 -58 -58 -58 -58 11.0 12.5 15.6 0.8 1.2
UNIT dB dB dB dB dB dB dB dB mV mV mV mV dB dB dB dB dB dB dB dB pF pF pF pC pC
RL = 50 ; CL = 5 pF; fin = 1 MHz; see Fig.19; note 2
1.65 2.3 3 4.5
ct(E-Y/Z)
crosstalk between control input to signal output
RL = 600 ; CL = 50 pF; fin = 1 MHz; tr = tf = 2 ns; see Fig.20
1.65 2.3 3 4.5 1.65 2.3 3 4.5
ct(S)
crosstalk between switches)
RL = 600 ; CL = 50 pF; fin = 1 MHz; see Fig.21
RL = 50 ; CL = 5 pF; fin = 1 MHz; see Fig.21
1.65 2.3 3 4.5
CPD
power dissipation capacitance
fin = 10 MHz
2.5 3.3 5.0
Q
charge injection
CL = 0.1 nF; Vgen = 0 V; Rgen = 0 ; 3.3 f = 1 MHz; RL = 1 M; see Fig.22; 5.5 note 3
Notes 1. Adjust fin voltage to obtain 0 dBm level at output. Increase fin frequency until dB meter reads -3 dB. 2. Adjust fin voltage to obtain 0 dBm level at input. 3. Guaranteed by design.
handbook, full pagewidth
VIH
E
0.1 F
Y/Z
Z/Y RL
VO CL dB
fin
50 channel ON
1/2VCC
MNA669
Fig.17 Test circuit for measuring the frequency response when switch is ON.
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
handbook, full pagewidth
E VIH 10 F VO RL channel ON 1/2VCC
MNA670
Y/Z 600
Z/Y
fin
CL
DISTORTION METER
VCC 1.65 V 2.3 V 3V 4. V
VIH 1.4 V (p-p) 2 V (p-p) 2.5 V (p-p) 4 V (p-p) Fig.18 Test circuit for measuring sine-wave distortion.
handbook, full pagewidth
VIL 0.1 F
E
Y/Z RL channel OFF
Z/Y RL 1/2VCC
VO CL dB
fin
50
1/2VCC
MNB113
Fig.19 Test circuit for measuring feed-through when switch is OFF.
handbook, full pagewidth
E
Y/Z 50 Rin 600 1/2VCC
Z/Y RL 600 1/2VCC
VO CL 50 pF
MNA672
Fig.20 Crosstalk between control input to signal output.
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
handbook, full pagewidth
VIH 0.1 F 50 Rin 600 fin
E1
1Y or 1Z
1Z or 1Y RL 600 channel ON 1/2VCC
VO1 CL 50 pF
VIL
E2
2Y or 2Z Rin 600 channel OFF
2Z or 2Y RL 600 1/2VCC
VO2 CL 50 pF
MNB114
Fig.21 Crosstalk between switches.
handbook, full pagewidth
E
Rgen Y/Z logic input
Z/Y 1 M
VO CL 0.1 nF
Vgen
MNA674
RL
handbook, full pagewidth
logic input (E)
off
on
off
VO
Vout
MNA675
Q = Vout x CL
Fig.22 Charge injection test.
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
PACKAGE OUTLINES SO14: plastic small outline package; 14 leads; body width 3.9 mm; body thickness 1.47 mm
74LVC4066
SOT108-2
D
E
A X
c y HE vMA
Z 14 8
A2 A1 pin 1 index
(A 3) Lp L
A
1 e bp
7 wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm A max. 1.75 A1 0.25 0.10 A2 1.55 1.40 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 8.75 8.55 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.7 0.3 0.028 0.012
inches 0.069
0.010 0.061 0.004 0.055
0.019 0.0100 0.35 0.014 0.0075 0.34
0.244 0.039 0.041 0.228 0.016
8 0o
o
Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT108-2 REFERENCES IEC JEDEC MS-012 JEITA EUROPEAN PROJECTION
ISSUE DATE 01-05-29 03-02-19
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
D
E
A
X
c y HE vMA
Z
14
8
Q A2 pin 1 index A1 Lp L (A 3) A
1
e bp
7
wM detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.72 0.38 8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18
2003 Aug 12
20
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm
D
B
A
A A1 E c
terminal 1 index area
detail X
terminal 1 index area e 2 L
e1 b 6 vMCAB wM C y1 C
C y
1 Eh 14
7 e 8
13 Dh 0
9 X 2.5 scale 5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 3.1 2.9 Dh 1.65 1.35 E (1) 2.6 2.4 Eh 1.15 0.85 e 0.5 e1 2 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1
Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT762-1 REFERENCES IEC --JEDEC MO-241 JEITA --EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27
2003 Aug 12
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Philips Semiconductors
Product specification
Quad bilateral switches
DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development DEFINITION
74LVC4066
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
II
Preliminary data Qualification
III
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2003 Aug 12
22
Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613508/01/pp23
Date of release: 2003
Aug 12
Document order number:
9397 750 11652

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